The main application for MCC’s PCI-QUAD04 is to read quadrature encoders, utilizing the encoder’s A and B output signals.  Encoders often have a third output, called an index.  For rotary encoders, the typical index pulses once per revolution, providing a narrow pulse equal to about one-quarter of the width of the A/B pulses.   To utilize the encoder’s index, you wire it to the PCI-QUAD04’s index input and configure the UL software accordingly. 

If not utilizing the encoder’s index output, MCC historically recommended physical termination along with software configuration for the PCI-QUAD04's index input.   That recommendation has since changed ... MCC began (in the second half of 2017) populating the PCI-QUAD04 with the newer LS7267 counter chip instead of the obsolete LS7266, and the index behavior of the counter chip has changed.   

The behavior of the index input on the LS7267 differs from the LS7266.   Both work the same with common commercially-available encoders, as those encoders have index pulses which are narrow enough to not exceed one A/B cycle.   However, for customers not using the index, and who followed MCC’s legacy termination advice for the LS7266, the LS7267 may not show any counting activity at all.  This is because the legacy LS7266’s index input was tolerant of wider pulses (and static inputs) while the LS7267 is not.   Hence MCC now provides new advice.   Listed below are both the new advice and the legacy advice:

New advice for PCI-QUAD04 boards populated with LS7267:

The LS7267 chip now used on the PCI-QUAD04 board can still exhibit a shortcoming that the LS7266 did (unable to fully ignore its index input, described in the last section of this FAQ).  If you are not wiring the index output of your encoder to the PCI-QUAD04, below are 3 recommended combinations of software settings and physical terminations.  The first listed is the preferred method for new applications, while the other two may help leverage settings/wiring from legacy systems:

Configure the IndexMode for IndexDisabled, configure GateState for Enabled, and also physically tie the index input high.   

If you set the IndexMode via UL software to “Load CTR”, and you set InvertIndex via UL software to “disabled”, then you must physically tie the index input low.   Do not tie the index input high (as this will inhibit counting).

If you set the IndexMode via UL software to “Load CTR”, and you set InvertIndex via UL software to “enabled”, then you must physically tie the index input high.   Do not tie the index input low (as this will inhibit counting).

Legacy advice for PCI-QUAD04 boards populated with LS7266:

If your encoder readings are nearly always correct, but occasionally are offset by something like 256, and the offset corrects itself in the next reading resulting in no permanent gain or loss in counts, then the following advice can help to explain and prevent this. The LS7266 chip historically used on the PCI-QUAD04 board did not truly ignore index activity when it is set for disabled.  Apparently stray index pulses/noise can cause the counter to latch one byte at the wrong time, resulting in a temporary incorrect value (usually of the rollover value 256).  Below are the details and a workaround that works for users who never want to use the index pulse:

The disable index feature of the LS7266 disables synchronous index mode, but does not physically disable the input pin.  Any activity on the index will still be seen by the chip. Keeping the index input high allowed the chip to work properly.  There are two options to ensure reliable operation.  The easiest is to strap index-to 0V and index+ to 5V at the I/O connector.   Alternatively (or in addition to be 100% sure):   UL programmers can modify the way in which the cbC7266Config function gets called by changing the IndexMode parameter from INDEX_DISABLED to LOAD_CTR.   The effect of this, plus tying the index input high, prevents false responses to the index input.